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  <div class="section" id="vta-installation-guide">
<h1>VTA安装指南<a class="headerlink" href="#vta-installation-guide" title="永久链接至标题">¶</a></h1>
<p>我们提供了三种安装指南，后者依次由前者扩展而来：</p>
<ol class="arabic simple">
<li><p><a class="reference internal" href="#vta-simulator-installation">VTA模拟器的安装</a></p></li>
<li><p><a class="reference internal" href="#xilinx-pynq-fpga-setup">基于Xilinx Pynq的FPGA开发配置</a></p></li>
<li><p><a class="reference internal" href="#intel-de10-fpga-setup">基于Intel DE10的FPGA开发配置</a></p></li>
<li><p><a class="reference internal" href="#bitstream-generation-with-xilinx-toolchains">使用Xilinx工具链的位流生成</a></p></li>
<li><p><a class="reference internal" href="#bitstream-generation-with-intel-toolchains">使用Intel工具链的位流生成</a></p></li>
</ol>
<div class="section" id="vta-simulator-installation">
<h2>VTA模拟器的安装<a class="headerlink" href="#vta-simulator-installation" title="永久链接至标题">¶</a></h2>
<p>在此之前，您需要在设备中`安装TVM &lt;<a class="reference external" href="https://tvm.apache.org/docs/install/index.html">https://tvm.apache.org/docs/install/index.html</a>&gt;`_。您可以参考 <a href="#id1"><span class="problematic" id="id2">`</span></a>Docker指南 &lt;<a class="reference external" href="https://tvm.apache.org/docs/install/docker.html">https://tvm.apache.org/docs/install/docker.html</a>&gt;`_以进行快速安装。</p>
<p>若要使用VTA，您需要进行以下操作：</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="nb">export</span> <span class="nv">TVM_PATH</span><span class="o">=</span>&lt;path to TVM root&gt;
<span class="nb">export</span> <span class="nv">VTA_HW_PATH</span><span class="o">=</span><span class="nv">$TVM_PATH</span>/3rdparty/vta-hw
</pre></div>
</div>
<p>在构建TVM时，需要确认VTA功能仿真库处在可用状态。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="nb">cd</span> &lt;tvm-root&gt;
mkdir build
cp cmake/config.cmake build/.
<span class="nb">echo</span> <span class="s1">&#39;set(USE_VTA_FSIM ON)&#39;</span> &gt;&gt; build/config.cmake
<span class="nb">cd</span> build <span class="o">&amp;&amp;</span> cmake .. <span class="o">&amp;&amp;</span> make -j4
</pre></div>
</div>
<p>为了运行VTA的示例程序，您需要将VTA的python库添加到您的python路径中。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="nb">export</span> <span class="nv">PYTHONPATH</span><span class="o">=</span>/path/to/vta/python:<span class="si">${</span><span class="nv">PYTHONPATH</span><span class="si">}</span>
</pre></div>
</div>
<div class="section" id="testing-your-vta-simulation-setup">
<h3>测试您的VTA仿真配置<a class="headerlink" href="#testing-your-vta-simulation-setup" title="永久链接至标题">¶</a></h3>
<p>为了确保您正确地安装了VTA的python包，请运行以下的2D卷积测试平台。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>python &lt;tvm root&gt;/vta/tests/python/integration/test_benchmark_topi_conv2d.py
</pre></div>
</div>
<p>我们也欢迎您借助`VTA 编程教程 &lt;<a class="reference external" href="https://tvm.apache.org/docs/vta/tutorials/index.html">https://tvm.apache.org/docs/vta/tutorials/index.html</a>&gt;`_进行尝试。</p>
<blockquote>
<div><p><strong>注</strong>：您会注意到，每个卷积层的吞吐量都会以GOPS为单位进行报告。这些数字是通过对软件中的卷积进行估计后，所得出的模拟器实际可以达到的计算吞吐量。</p>
</div></blockquote>
</div>
<div class="section" id="advanced-configuration-optional">
<h3>高级配置（可选）<a class="headerlink" href="#advanced-configuration-optional" title="永久链接至标题">¶</a></h3>
<p>VTA是一种通用可配置的深度学习加速器。在``3rdparty/vta-hw/config``目录下的``vta_config.json``记录了VTA的相关配置。该文档通过提供VTA加速器的结构规范，以对TVM编译堆栈与VTA硬件堆栈进行参数化处理。</p>
<p>VTA的配置文件也指定了TVM的编译目标。当设置``TARGET``为``sim``时，将执行VTA仿真器上的所有TVM工作负载。您也可以修改配置文件的内容，以使用不同的参数重新构建VTA。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="nb">cd</span> &lt;tvm root&gt;
vim 3rdparty/vta-hw/config/vta_config.json
<span class="c1"># edit vta_config.json</span>
make
</pre></div>
</div>
</div>
</div>
<div class="section" id="xilinx-pynq-fpga-setup">
<h2>基于Xilinx Pynq的FPGA开发配置<a class="headerlink" href="#xilinx-pynq-fpga-setup" title="永久链接至标题">¶</a></h2>
<p>该指南由以上的*VTA仿真器安装*扩展而来，使您可以在完整的TVM框架与VTA的软、硬件堆栈上运行FPGA的硬件测试程序。</p>
<ul class="simple">
<li><p>FPGA开发板在`Pynq &lt;<a class="reference external" href="http://www.pynq.io/">http://www.pynq.io/</a>&gt;`_售价为$200，学习板在`Digilent &lt;<a class="reference external" href="https://store.digilentinc.com/pynq-z1-python-productivity-for-zynq/">https://store.digilentinc.com/pynq-z1-python-productivity-for-zynq/</a>&gt;`_的售价为$150。</p></li>
<li><p>一个用来连接Pynq板与您的开发设备的以太网-USB转接器。</p></li>
<li><p>一块容量至少为8GB的Micro SD卡。</p></li>
<li><p>一个规格为12V 3A的整流器。</p></li>
</ul>
<p>该指南包括以下主题：</p>
<ol class="arabic simple">
<li><p>Pynq板的设置说明</p></li>
<li><p>Pynq-Side RPC服务构建与开发。</p></li>
<li><p>回顾*VTA仿真器安装*指南中的测试样例，这次我们将在Pynq板上执行这些测试样例。</p></li>
</ol>
<div class="section" id="pynq-board-setup">
<h3>Pynq板的设置<a class="headerlink" href="#pynq-board-setup" title="永久链接至标题">¶</a></h3>
<p>请根据`Pynq板入门教程 &lt;<a class="reference external" href="http://pynq.readthedocs.io/en/latest/getting_started.html">http://pynq.readthedocs.io/en/latest/getting_started.html</a>&gt;`_来进行Pynq板的设置。</p>
<p>您应该按照说明进行操作，直到*Turning On the PYNQ-Z1*这一步（不必理会这一步之后的内容）。</p>
<ul class="simple">
<li><p>请确认您已经下载了最新的Pynq镜像，<a class="reference external" href="http://www.pynq.io/board.html">PYNQ-Z1 v2.5</a>，并将其烧写到您的SD卡中（我们推荐免费工具`Etcher &lt;<a class="reference external" href="https://etcher.io/">https://etcher.io/</a>&gt;`_）。</p></li>
<li><p>对于该测试设置，请参考`”Connect to a Computer” &lt;<a class="reference external" href="https://pynq.readthedocs.io/en/latest/getting_started/pynq_z1_setup.html">https://pynq.readthedocs.io/en/latest/getting_started/pynq_z1_setup.html</a>&gt;`_中的以太网设置说明。关于如何连接到开发板，请参考`assign your computer a static IP address &lt;<a class="reference external" href="https://pynq.readthedocs.io/en/latest/appendix.html#assign-your-computer-a-static-ip">https://pynq.readthedocs.io/en/latest/appendix.html#assign-your-computer-a-static-ip</a>&gt;`_</p></li>
</ul>
<p>一旦开发板启动成功，并且接到了您的开发设备上，请尝试连接开发板，以确认您已经正确地进行了设置。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># To connect to the Pynq board use the &lt;username, password&gt; combo: &lt;xilinx, xilinx&gt;</span>
ssh xilinx@192.168.2.99
</pre></div>
</div>
</div>
<div class="section" id="pynq-side-rpc-server-build-deployment">
<h3>Pynq-Side RPC服务构建与开发<a class="headerlink" href="#pynq-side-rpc-server-build-deployment" title="永久链接至标题">¶</a></h3>
<p>因为开发板与计算机直接相连，可以防止开发板直接访问互联网，所以我们需要参考`sshfs &lt;<a class="reference external" href="https://www.digitalocean.com/community/tutorials/how-to-use-sshfs-to-mount-remote-file-systems-over-ssh">https://www.digitalocean.com/community/tutorials/how-to-use-sshfs-to-mount-remote-file-systems-over-ssh</a>&gt;`_，将Pynq的系统文件安装到您的开发设备的系统文件中。接下来，我们将把TVM库直接复制到您开发设备的sshfs安装目录里。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># On the Host-side</span>
mkdir &lt;mountpoint&gt;
sshfs xilinx@192.168.2.99:/home/xilinx &lt;mountpoint&gt;
<span class="nb">cd</span> &lt;mountpoint&gt;
git clone --recursive https://github.com/apache/tvm tvm
<span class="c1"># When finished, you can leave the moutpoint and unmount the directory</span>
<span class="nb">cd</span> ~
sudo umount &lt;mountpoint&gt;
</pre></div>
</div>
<p>由于已经将VTA库复制到了Pynq的系统文件里，我们可以使用ssh远程连接并启动基于TVM的RPC服务构建程序。这个过程大概需要5分钟。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>ssh xilinx@192.168.2.99
<span class="c1"># Build TVM runtime library (takes 5 mins)</span>
<span class="nb">cd</span> /home/xilinx/tvm
mkdir build
cp cmake/config.cmake build/.
<span class="nb">echo</span> <span class="s1">&#39;set(USE_VTA_FPGA ON)&#39;</span> &gt;&gt; build/config.cmake
<span class="c1"># Copy pynq specific configuration</span>
cp 3rdparty/vta-hw/config/pynq_sample.json 3rdparty/vta-hw/config/vta_config.json
<span class="nb">cd</span> build
cmake ..
make runtime vta -j2
<span class="c1"># FIXME (tmoreau89): remove this step by fixing the cmake build</span>
make clean<span class="p">;</span> make runtime vta -j2
<span class="c1"># Build VTA RPC server (takes 1 min)</span>
<span class="nb">cd</span> ..
sudo ./apps/vta_rpc/start_rpc_server.sh <span class="c1"># pw is &#39;xilinx&#39;</span>
</pre></div>
</div>
<p>在启动RPC服务时，您应该能看到程序显示的以下内容。为了执行下一个样例，您需要让RPC服务在后台作为``ssh``会话并保持运行。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>INFO:root:RPCServer: <span class="nb">bind</span> to <span class="m">0</span>.0.0.0:9091
</pre></div>
</div>
<p>关于Pynq RPC服务的注意事项：</p>
<ul class="simple">
<li><p>RPC服务应该配置在``9091``端口上。否则，之前的进程可能会意外终止。遇到这种情况时，推荐重新启动Pynq，并重新运行RPC服务。</p></li>
<li><p>只需要使用``Ctrl + c``快捷键就可以杀死RPC服务进程。您可以使用``sudo ./apps/pynq_rpc/start_rpc_server.sh``命令来重新启动它。</p></li>
<li><p>如果未响应，您可以使用开发板的电源键来重启开发板。</p></li>
</ul>
</div>
<div class="section" id="testing-your-pynq-based-hardware-setup">
<h3>对基于Pynq的硬件设置进行测试<a class="headerlink" href="#testing-your-pynq-based-hardware-setup" title="永久链接至标题">¶</a></h3>
<p>在使用您的开发设备运行样例之前，您需要按照以下的步骤设置您的主机环境：</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># On the Host-side</span>
<span class="nb">export</span> <span class="nv">VTA_RPC_HOST</span><span class="o">=</span><span class="m">192</span>.168.2.99
<span class="nb">export</span> <span class="nv">VTA_RPC_PORT</span><span class="o">=</span><span class="m">9091</span>
</pre></div>
</div>
<p>另外，您需要将主机上的``vta_config.json``文件内的``TARGET``值设置为``”pynq”<a href="#id1"><span class="problematic" id="id2">``</span></a>，以表明我们正在指向Pynq平台。 &gt; 注：与仿真器设置相反，由于主机将所有的计算都转移到了Pynq板上，因此主机侧不需要编译任何库。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># On the Host-side</span>
<span class="nb">cd</span> &lt;tvm root&gt;
cp 3rdparty/vta-hw/config/pynq_sample.json 3rdparty/vta-hw/config/vta_config.json
</pre></div>
</div>
<p>我们将再次运行2D卷积测试平台。在此之前，我们需要使用VTA位流来进行基于Pynq板的FPGA编程,并通过RPC来构建VTA运行库。接下来的 <a href="#id1"><span class="problematic" id="id2">``</span></a>test_program_rpc.py``脚本将执行这两种操作。</p>
<ul class="simple">
<li><p>FPGA编程。在主机对``vta_config.json``配置文件进行设置后，可以从与该配置文件相匹配的VTA位流库`VTA bitstream repository &lt;<a class="reference external" href="https://github.com/uwsampl/vta-distro">https://github.com/uwsampl/vta-distro</a>&gt;`_ 下载经过预编译的位流，并通过RPC将其发送给Pynq，即可实现基于Pynq的FPGA编程。</p></li>
<li><p>每当对``vta_config.json``配置文件进行修改后，都需要构建Pynq运行库。该操作能确保VTA软件运行库符合基于FPGA编码的VTA设计标准。其中，VTA软件运行库在这里的作用是通过即时编译来生成可用的加速器。稍安勿躁，完成构建过程需要约30秒的时间。</p></li>
</ul>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># On the Host-side</span>
python &lt;tvm root&gt;/vta/tests/python/pynq/test_program_rpc.py
</pre></div>
</div>
<p>现在，我们准备在硬件上运行2D卷积测试平台。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># On the Host-side</span>
python &lt;tvm root&gt;/vta/tests/python/integration/test_benchmark_topi_conv2d.py
</pre></div>
</div>
<p>衡量出的Pynq板的性能指标将报告给各卷积层。</p>
<p><strong>注</strong>：您可以通过与Pynq相连接的``ssh``会话来查看RPC服务的日志信息，以追踪FPGA编程进度与运行库重构过程。</p>
<p>您也可以使用我们的VTA编程教程`VTA programming tutorials &lt;<a class="reference external" href="https://tvm.apache.org/docs/vta/tutorials/index.html">https://tvm.apache.org/docs/vta/tutorials/index.html</a>&gt;`_进行练习。</p>
</div>
</div>
<div class="section" id="intel-de10-fpga-setup">
<h2>基于Intel DE10的FPGA开发配置<a class="headerlink" href="#intel-de10-fpga-setup" title="永久链接至标题">¶</a></h2>
<p>与Pynq-Side的设置过程类似，该指南将以DE10-Nano为例，指导您在Linux环境下进行Intel的FPGA开发板的相关设置。</p>
<p>在硬件方面，您需要一块DE10-Nano开发板，其在`DE10-Nano Development Kit &lt;<a class="reference external" href="https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&amp;No=1046">https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&amp;No=1046</a>&gt;`_标价为$130，学习板在`Terasic &lt;<a class="reference external" href="https://www.terasic.com.tw/">https://www.terasic.com.tw/</a>&gt;`_标价为$100。该套装中还包括Micro-SD卡、电源线记USB线。然而，您还需要准备一根以太网网线来连接开发板与LAN。</p>
<p>在指南的剩余部分，我们将提供执行以下操作的步骤</p>
<ul class="simple">
<li><p>将最新版本的Angstrom Linux系统镜像烧录到Micro-SD卡中</p></li>
<li><p>交叉编译的设置</p></li>
<li><p>设备端RPC服务设置与部署</p></li>
</ul>
<div class="section" id="de10-nano-board-setup">
<h3>DE10-Nano开发板的设置<a class="headerlink" href="#de10-nano-board-setup" title="永久链接至标题">¶</a></h3>
<p>在启动设备之前，我们需要将最新版本的Angstrom Linux系统镜像烧录到Micro-SD卡中。</p>
<div class="section" id="flash-sd-card-and-boot-angstrom-linux">
<h4>Micro-SD卡的烧录与Angstrom Linux系统的装载<a class="headerlink" href="#flash-sd-card-and-boot-angstrom-linux" title="永久链接至标题">¶</a></h4>
<p>要烧录Micro-SD卡并在DE10-Nano板上装载Linux系统，推荐参考Terasic公司的DE10-Nano产品页下的相关标签`Resource &lt;<a class="reference external" href="https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&amp;CategoryNo=167&amp;No=1046&amp;PartNo=4">https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&amp;CategoryNo=167&amp;No=1046&amp;PartNo=4</a>&gt;`_。浏览该网页需要先进行登录注册，在这之后就可以下载构建好的Angstrom Linux系统镜像并进行烧录了。特别要说明的是，关于如何将下载好的Linux Micro-SD卡镜像烧录到您的实体Micro-SD卡中：</p>
<p>第一步，解压gzip压缩文件。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>tar xf de10-nano-image-Angstrom-v2016.12.socfpga-sdimg.2017.03.31.tgz
</pre></div>
</div>
<p>解压得到一个文件名为``de10-nano-image-Angstrom-v2016.12.socfpga-sdimg``的SD卡镜像（大小约为2.4 GB），里面包括了装载Angstrom Linux所需要的所有系统文件。</p>
<p>第二步，将预备烧录的SD卡插入到您的计算机中，输入命令``fdisk -l``来识别其磁盘号，如果您想使用图形用户界面，也可以使用``gparted``命令。SD卡的设备名格式一般类似于 <code class="docutils literal notranslate"><span class="pre">/dev/sdb</span></code>。</p>
<p>接下来，请使用以下命令将磁盘镜像烧录至您的实体SD卡中。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># NOTE: root privilege is typically required to run the following command.</span>
dd <span class="k">if</span><span class="o">=</span>de10-nano-image-Angstrom-v2016.12.socfpga-sdimg <span class="nv">of</span><span class="o">=</span>/dev/sdb <span class="nv">status</span><span class="o">=</span>progress
</pre></div>
</div>
<p>您的计算机需要几分钟时间将整个文件系统写入SD卡中。在这个过程结束之后，您可以准备卸载SD卡并将其插入到DE10-Nano开发板中。现在您可以连接电源以及串行端口，以装载Angstrom Linux系统。</p>
<blockquote>
<div><p><strong>注</strong>：从Micro-SD卡装载系统的时候，可能会发生与Linux内核``zImage``不兼容的问题。出现这种情况时，您可能需要从`linux-socfpga &lt;<a class="reference external" href="https://github.com/altera-opensource/linux-socfpga">https://github.com/altera-opensource/linux-socfpga</a>&gt;`_库的分支`socfpga-4.9.78-ltsi &lt;<a class="reference external" href="https://github.com/altera-opensource/linux-socfpga/tree/socfpga-4.9.78-ltsi">https://github.com/altera-opensource/linux-socfpga/tree/socfpga-4.9.78-ltsi</a>&gt;`_来重新构建与您的环境相匹配的``zImage``文件。想省事儿的话，也可以从 ` &lt;<a class="reference external" href="https://raw.githubusercontent.com/liangfu/de10-nano-supplement/master/zImage">https://raw.githubusercontent.com/liangfu/de10-nano-supplement/master/zImage</a>&gt;`_下载构建好的``zImage``版本。</p>
</div></blockquote>
<p>在使用USB连接DE10-Nano板后，连接电源并启动开发板。然后您可以使用``minicom``将设备的串行端口连接到您的主机上。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># NOTE: root privilege is typically required to run the following command.</span>
minicom -D /dev/ttyUSB0
</pre></div>
</div>
<p>设备的默认用户名为``root``，该用户初始密码为空。</p>
<p>您需要安装支持Python3的包（TVM已经不再支持Python2），特别地，您需要安装的包有``numpy``、<code class="docutils literal notranslate"><span class="pre">attrs</span></code> 和``decorator``。</p>
<blockquote>
<div><p><strong>注</strong>：在DE10-Nano设备上您可能无法使用``pip3``成功安装``numpy``。遇到这种情况时，您可以选择通过`meta-de10-nano &lt;<a class="reference external" href="https://github.com/intel/meta-de10-nano">https://github.com/intel/meta-de10-nano</a>&gt;`_库来构建与您的开发板相匹配的文件系统镜像；您也可以选择从现有的、例如Debian等的Linux发行版本来下载预构建的包。追求速度的话，我们准备了备用的文件`点击此处 &lt;<a class="reference external" href="https://raw.githubusercontent.com/liangfu/de10-nano-supplement/master/rootfs_supplement.tgz">https://raw.githubusercontent.com/liangfu/de10-nano-supplement/master/rootfs_supplement.tgz</a>&gt;`_，您可以将该文件解压到文件根系统内。</p>
</div></blockquote>
</div>
<div class="section" id="install-required-python-packages">
<h4>安装所需的Python包<a class="headerlink" href="#install-required-python-packages" title="永久链接至标题">¶</a></h4>
<p>在从串行端口连接bash终端后，要构建安装TVM和VTA程序，必须先安装所需的Python包。</p>
</div>
<div class="section" id="build-additional-components-to-use-vta-bitstream">
<h4>构建附加组件以使用VTA位流<a class="headerlink" href="#build-additional-components-to-use-vta-bitstream" title="永久链接至标题">¶</a></h4>
<p>您还需要编译几个系统的附加组件，以在DE10-Nano硬件上使用上述构建好的位流。特别地，为了在系统中编译可执行的应用文件，您需要下载并安装`SoCEDS &lt;<a class="reference external" href="http://fpgasoftware.intel.com/soceds/18.1/?edition=standard&amp;download_manager=dlm3&amp;platform=linux">http://fpgasoftware.intel.com/soceds/18.1/?edition=standard&amp;download_manager=dlm3&amp;platform=linux</a>&gt;`_ （推荐），或者您也可以在主机上安装``g++-arm-linux-gnueabihf``包。您还需要``cma``终端模块以分配相邻内存，以及一个用来连接VTA子系统的驱动。</p>
</div>
</div>
</div>
<div class="section" id="bitstream-generation-with-xilinx-toolchains">
<h2>使用Xilinx工具链的位流生成<a class="headerlink" href="#bitstream-generation-with-xilinx-toolchains" title="永久链接至标题">¶</a></h2>
<p>相对于使用预构建的VTA位流，如果您自己对生成Xilinx FPGA位流更感兴趣，请参考以下的说明。</p>
<div class="section" id="xilinx-toolchain-installation">
<h3>Xilinx工具链的安装<a class="headerlink" href="#xilinx-toolchain-installation" title="永久链接至标题">¶</a></h3>
<p>我们推荐使用Vivado 2020.1，因为我们已经使用该版本的Xilinx工具链对我们的脚本进行了有效的测试。我们的指南是默认您在Linux（Ubuntu）环境下进行相关安装操作的。</p>
<p>您需要从如下链接安装Xilinx的FPGA编译工具链，<a class="reference external" href="https://www.xilinx.com/products/design-tools/vivado.html">Vivado HL WebPACK 2020.1</a>。这是Vivado HLx 工具链的一个免许可证版本。</p>
<div class="section" id="obtaining-and-launching-the-vivado-gui-installer">
<h4>Vivado GUI Installer的获取与启动<a class="headerlink" href="#obtaining-and-launching-the-vivado-gui-installer" title="永久链接至标题">¶</a></h4>
<ol class="arabic simple">
<li><p>请访问`download webpage &lt;<a class="reference external" href="https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/2020-1.html">https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/2020-1.html</a>&gt;`_，下载适用于Vivado HLx 2020.1: WebPACK and Editions版本的Linux Self Extracting Web Installer。</p></li>
<li><p>您需要使用Xilinx账户进行登录。创建Xilinx账户需要大概2分钟的时间。</p></li>
<li><p>点击“Next”来完成姓名与地址认证。接下来您就可以下载一个二进制文件，其文件名为``Xilinx_Unified_2020.1_0602_1208_Lin64.bin``。</p></li>
<li><p>下载完成后，请进入您的下载目录，并修改文件权限以使其可以正常运行。</p></li>
</ol>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>chmod u+x Xilinx_Unified_2020.1_0602_1208_Lin64.bin
</pre></div>
</div>
<ol class="arabic simple" start="5">
<li><p>现在您可以执行该二进制文件了：</p></li>
</ol>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>./Xilinx_Unified_2020.1_0602_1208_Lin64.bin
</pre></div>
</div>
</div>
<div class="section" id="xilinx-vivado-gui-installer-steps">
<h4>Xilinx Vivado GUI Installer的运行步骤<a class="headerlink" href="#xilinx-vivado-gui-installer-steps" title="永久链接至标题">¶</a></h4>
<p>此时，您已经启动了Vivado 2020.1 Installer GUI程序。</p>
<ol class="arabic simple">
<li><p>在初始界面点击“Next”。</p></li>
<li><p>在“选择安装类型”界面，请输入在“User Authentication”框内的用户凭证，在点击下一步前，请记得选择“Download and Install Now”选项。</p></li>
<li><p>在”Accept License Agreements”界面，请同意所有的条款，然后点击“Next”。</p></li>
<li><p>在”Select Edition to Install”界面，选择“Vivado HL WebPACK”，然后点击“Next”。</p></li>
<li><p>在”Vivado HL WebPACK”界面，请检查以下选项（其它选项不要选）：* Design Tools -&gt; Vivado Design Suite -&gt; Vivado * Devices -&gt; Production Devices -&gt; SoCs -&gt; Zynq-7000 （如果您正在连接Pynq板） * Devices -&gt; Production Devices -&gt; SoCs -&gt; UltraScale+ MPSoC （如果您正在连接Ultra-96 板）</p></li>
<li><p>整个下载文件的体积应该约为5GB，需要23GB的磁盘容量。</p></li>
<li><p>在”Select Destination Directory”界面，设定安装路径，然后点击“Next”。有些路径可能会被红色高亮——这是因为安装程序在这些路径里没有写权限。遇到这种情况时，请选择那些不需要特殊写权限的路径（如您的主目录）。</p></li>
<li><p>在”Installation Summary”界面，点击“Install”。</p></li>
<li><p>程序会自动弹出一个”Installation Progress”窗口，以追踪下载与安装过程。</p></li>
<li><p>这个过程将持续约20-30分钟，具体取决于您的连接速度。</p></li>
<li><p>在安装成功完成后，将弹出一个窗口来提示您。点击”OK”。</p></li>
<li><p>最后，会启动”Vivado License Manager”。选择”Get Free ISE WebPACK, ISE/Vivado IP or PetaLinux License”并点击”Connect Now”以完成许可的注册。</p></li>
</ol>
</div>
<div class="section" id="environment-setup">
<h4>环境设置<a class="headerlink" href="#environment-setup" title="永久链接至标题">¶</a></h4>
<p>最后一步，就是通过以下操作来更新您的 <a href="#id1"><span class="problematic" id="id2">``</span></a>~/.bashrc``目录。由于这里面包括了所有的Xilinx binary路径，所以您可以使用命令行来启动编译脚本。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># Xilinx Vivado 2020.1 environment</span>
<span class="nb">export</span> <span class="nv">XILINX_VIVADO</span><span class="o">=</span><span class="si">${</span><span class="nv">XILINX_PATH</span><span class="si">}</span>/Vivado/2020.1
<span class="nb">export</span> <span class="nv">PATH</span><span class="o">=</span><span class="si">${</span><span class="nv">XILINX_VIVADO</span><span class="si">}</span>/bin:<span class="si">${</span><span class="nv">PATH</span><span class="si">}</span>
</pre></div>
</div>
</div>
</div>
<div class="section" id="hls-based-custom-vta-bitstream-compilation-for-pynq">
<h3>在Pynq上进行基于HLS修饰的VTA位流编译<a class="headerlink" href="#hls-based-custom-vta-bitstream-compilation-for-pynq" title="永久链接至标题">¶</a></h3>
<p>VTA的设置文件中列出了高级硬件参数，用户可以根据需要进行修改。在该修饰的VTA位流编译练习中，我们将改变我们设计的频率，使其稍微高一些。</p>
<ul class="simple">
<li><p>将``HW_FREQ``值设为``142``。Pynq开发板支持100、142、167与200MHz的时钟频率。请注意，频率越高，越难以接近正确时序。提高频率可能会导致时序违例，并导致硬件运行出现错误。</p></li>
<li><p>将``HW_CLK_TARGET``设置为``6``。该参数是以纳秒为单位的HLS的时钟周期。若降低时钟周期，则为了在更高的频率上达到时序收敛，会导致更加激进的流水。从技术上讲，142MHz的时钟频率对应所需的目标值为7纳秒，但我们会特意把时钟目标值降低为6纳秒，以使我们的设计流水更加激进。</p></li>
</ul>
<p>位流的生成是由``&lt;tvm root&gt;/3rdparty/vta-hw/hardware/xilinx/<a href="#id1"><span class="problematic" id="id2">``</span></a>目录下的顶级``Makefile``驱动的。</p>
<p>如果您只是想用软件模拟的方式进行VTA的设计仿真，以证明其有效性，请输入：</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="nb">cd</span> &lt;tvm root&gt;/3rdparty/vta-hw/hardware/xilinx
make ip <span class="nv">MODE</span><span class="o">=</span>sim
</pre></div>
</div>
<p>如果您想在不启动整个布局布线设计的情况下生成基于HLS的VTA IP核心，请输入：</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>make ip
</pre></div>
</div>
<p>您可以访问``&lt;tvm root&gt;/3rdparty/vta-hw/build/hardware/xilinx/hls/&lt;configuration&gt;/&lt;block&gt;/solution0/syn/report/&lt;block&gt;_csynth.rpt``文件，以查看HLS的综合报告。</p>
<blockquote>
<div><p><strong>注</strong>：<a href="#id1"><span class="problematic" id="id2">``</span></a>&lt;configuration&gt;``字符串汇总了``vta_config.json``文件中列出的VTA设置参数。<a href="#id3"><span class="problematic" id="id4">``</span></a>&lt;block&gt;``指向构成高级VTA流水线的特定模块（或是HLS的函数）。</p>
</div></blockquote>
<p>最后，执行``make``命令，以运行整个硬件编译过程，并生成VTA位流。</p>
<p>该过程耗时很长，具体视您的设备配置，一般需要约一个小时的时间。为了能充分使用您开发设备的所有处理器核，我们推荐您对Makefile中的``VTA_HW_COMP_THREADS``变量进行设置。</p>
<p>编译过程完成后，生成的位流会保存为``&lt;tvm root&gt;/3rdparty/vta-hw/build/hardware/xilinx/vivado/&lt;configuration&gt;/export/vta.bit``。</p>
</div>
<div class="section" id="using-a-custom-bitstream">
<h3>使用修饰过的位流<a class="headerlink" href="#using-a-custom-bitstream" title="永久链接至标题">¶</a></h3>
<p>您可以通过修改教程样例中，或``test_program_rpc.py``脚本中的``vta.program_fpga()``函数，来设置位流的路径，以此编码新的VTA FPGA位流。</p>
<div class="highlight-python notranslate"><div class="highlight"><pre><span></span><span class="n">vta</span><span class="o">.</span><span class="n">program_fpga</span><span class="p">(</span><span class="n">remote</span><span class="p">,</span> <span class="n">bitstream</span><span class="o">=</span><span class="s2">&quot;&lt;tvm root&gt;/3rdparty/vta-hw/build/hardware/xilinx/vivado/&lt;configuration&gt;/export/vta.bit&quot;</span><span class="p">)</span>
</pre></div>
</div>
<p>TVM会使用您刚刚使用VTA设计并生成的、时钟频率更高的新位流，而不是从VTA位流库下载一个预构建的位流。您注意到它在ImageNet分类任务样例中所带来的明显的性能提升了吗？</p>
</div>
</div>
<div class="section" id="bitstream-generation-with-intel-toolchains">
<h2>使用Intel工具链的位流生成<a class="headerlink" href="#bitstream-generation-with-intel-toolchains" title="永久链接至标题">¶</a></h2>
<p>如果比起使用预构建的VTA位流，您对自行生成Xilinx FPGA位流更感兴趣的话，请参考以下的说明。</p>
<div class="section" id="intel-toolchain-installation">
<h3>Intel工具链的安装<a class="headerlink" href="#intel-toolchain-installation" title="永久链接至标题">¶</a></h3>
<p>我们推荐使用``Intel Quartus Prime 18.1``，文档中出现的所有测试代码都已经使用该版本进行了检验。</p>
<p>您需要通过以下链接安装Intel的FPGA编译工具链：<a class="reference external" href="http://fpgasoftware.intel.com/?edition=lite">Quartus Prime Lite</a>，这是Intel Quartus Prime software的一个免许可证版本。</p>
<div class="section" id="obtaining-and-launching-the-quartus-gui-installer">
<h4>Quartus GUI Installer的获取与启动<a class="headerlink" href="#obtaining-and-launching-the-quartus-gui-installer" title="永久链接至标题">¶</a></h4>
<ol class="arabic simple">
<li><p>请访问`download center &lt;<a class="reference external" href="http://fpgasoftware.intel.com/?edition=lite">http://fpgasoftware.intel.com/?edition=lite</a>&gt;`_，下载”Quartus Prime (include Nios II EDS)”的Linux版本以及”Separate file”标签下的”Cyclone V device support”文件。这可以使您无需下载其他无用的设备支持文件。</p></li>
<li><p>如果您已经拥有了账户，就可以直接填写表格。否则您需要在网页右边的注册栏进行账户注册。</p></li>
<li><p>登录之后，您就可以下载安装文件与设备支持文件。</p></li>
<li><p>下载完成后，请进入您的下载目录，并修改文件访问权限：</p></li>
</ol>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>chmod u+x QuartusLiteSetup-18.1.0.625-linux.run
</pre></div>
</div>
<ol class="arabic simple" start="5">
<li><p>现在请确认安装程序与设备支持文件在同一目录下，您可以使用以下的操作进行安装过程：</p></li>
</ol>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>./QuartusLiteSetup-18.1.0.625-linux.run
</pre></div>
</div>
<ol class="arabic simple" start="6">
<li><p>请参考弹出的GUI表格所显示的说明，将所有的内容安装至``/usr/local``目录下。在安装完成后，将产生``/usr/local/intelFPGA_lite/18.1``目录，目录内包含Quartus program等其他的可用程序。</p></li>
</ol>
</div>
<div class="section" id="id2">
<h4>环境设置<a class="headerlink" href="#id2" title="永久链接至标题">¶</a></h4>
<p>和安装Xilinx工具链时的操作类似，您需要在``~/.bashrc``中添加以下几行代码。</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="c1"># Intel Quartus 18.1 environment</span>
<span class="nb">export</span> <span class="nv">QUARTUS_ROOTDIR</span><span class="o">=</span><span class="s2">&quot;/usr/local/intelFPGA_lite/18.1/quartus&quot;</span>
<span class="nb">export</span> <span class="nv">PATH</span><span class="o">=</span><span class="si">${</span><span class="nv">QUARTUS_ROOTDIR</span><span class="si">}</span>/bin:<span class="si">${</span><span class="nv">PATH</span><span class="si">}</span>
<span class="nb">export</span> <span class="nv">PATH</span><span class="o">=</span><span class="si">${</span><span class="nv">QUARTUS_ROOTDIR</span><span class="si">}</span>/sopc_builder/bin:<span class="si">${</span><span class="nv">PATH</span><span class="si">}</span>
</pre></div>
</div>
<p>这将把quartus的二进制路径添加到您的``PATH``环境变量中，然后您就可以使用命令行来启动编译脚本了。</p>
</div>
</div>
<div class="section" id="chisel-based-custom-vta-bitstream-compilation-for-de10-nano">
<h3>在DE10-Nano上进行基于Chisel修饰的VTA位流编译<a class="headerlink" href="#chisel-based-custom-vta-bitstream-compilation-for-de10-nano" title="永久链接至标题">¶</a></h3>
<p>与基于HLS的设计相似，基于Chisel设计的高级硬件参数都列在了VTA的配置文件`Configs.scala &lt;<a class="reference external" href="https://github.com/apache/tvm/blob/main/3rdparty/vta-hw/hardware/chisel/src/main/scala/core/Configs.scala">https://github.com/apache/tvm/blob/main/3rdparty/vta-hw/hardware/chisel/src/main/scala/core/Configs.scala</a>&gt;`_中，用户可以自行进行编辑。</p>
<p>对于Intel的FPGA，<a href="#id1"><span class="problematic" id="id2">``</span></a>&lt;tvm root&gt;/3rdparty/vta-hw/hardware/intel``目录下的顶级``Makefile``驱动了位流的生成。</p>
<p>如果您想在不编译FPGA的硬件设计的情况下在DE10-Nano开发板上生成基于Chisel的VTA IP核心，请输入：</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span><span class="nb">cd</span> &lt;tvm root&gt;/3rdparty/vta-hw/hardware/intel
make ip
</pre></div>
</div>
<p>然后您可以在 <a href="#id1"><span class="problematic" id="id2">``</span></a>&lt;tvm root&gt;/3rdparty/vta-hw/build/hardware/intel/chisel/&lt;configuration&gt;/VTA.DefaultDe10Config.v``目录下找到生成的verilog文件。</p>
<p>如果您想在``de10nano``开发板上运行完整的硬件编译程序：</p>
<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>make
</pre></div>
</div>
<p>这个过程的耗时很长，视您的计算机配置，可能最长需要约半个小时的时间。Quartus Prime software会自动探知并使用您计算机所有可用的处理器核来执行该进程。</p>
<p>编译过程完成后，生成的位流会被保存为``&lt;tvm root&gt;/3rdparty/vta-hw/build/hardware/intel/quartus/&lt;configuration&gt;/export/vta.rbf``。您可以打开``&lt;tvm root&gt;/3rdparty/vta-hw/build/hardware/intel/quartus/&lt;configuration&gt;/<a href="#id1"><span class="problematic" id="id2">``</span></a>路径下的``de10_nano_top.qpf``Quartus project文件（.qdf），以查找生成报告。</p>
</div>
</div>
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